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Timer Timing
16
Timer Timing
Table 24. Timer Timing
181 MHz
No.
Characteristics
Expression
Min
Max
Unit
104
105
TIO Low
TIO High
2 × T C + 2.0
2 × T C + 2.0
13
13
—
—
ns
ns
Note:
1. V CORE_VDD = 1.25 V
TIO
± 0.05 V; T J = –40°C to 115°C for 150 MHz; T J = 0°C to 100°C for 181 MHz; C L = 50 pF
104
105
Figure 19. TIO Timer Event Input Restrictions
17
GPIO Timing
Table 25. GPIO Timing
No.
106
107
108
109
110
111
112
113
114
115
Characteristics 1
FOSC edge to GPIO out valid (GPIO out delay time)
FOSC edge to GPIO out not valid (GPIO out hold time)
FOSC In valid to EXTAL edge (GPIO in set-up time)
FOSC edge to GPIO in not valid (GPIO in hold time)
Minimum GPIO pulse high width (except Port F)
Minimum GPIO pulse low width (except Port F)
Minimum GPIO pulse low width (Port F)
Minimum GPIO pulse high width (Port F)
GPIO out rise time
GPIO out fall time
Expression
T C + 13
T C + 13
6 x T C
6 x T C
—
—
Min
—
—
2
0
19
19
33.3
33.3
—
—
Max
7
7
—
—
—
13
13
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note:
1. V CORE_VDD = 1.25 V ± 0.05 V; T J = –40°C to 115°C for 150 MHz; T J = 0°C to 100°C for 181 MHz; C L = 50 pF
2. PLL Disabled, EXTAL driven by a square wave
Figure 20. GPIO Timing
DSP56371 Data Sheet, Rev. 4.1
54
Freescale Semiconductor
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